This invention relates to the PLA (programmable logic array) system of an electronic multifunction timepiece. More particularly, it is directed to an electronic multifunction timepiece which is constructed into a semiconductor integrated circuit.
In electronic timepieces, a plurality of functions such as a stop watch function and a timer function have become necessary in addition to operational functions for a time display conforming with the standard time.
In order to obtain such a timepiece having a plurality of functions, exclusive circuits for executing the respective functions may be disposed and combined. With the combination of the exclusive circuits, however, when the number of desired functions increases, the whole circuit arrangement becomes complicated, and the number of elements to be used increases.
On the other hand, a dynamic logic system may be adopted. In the dynamic logic system, data processings for realizing the plurality of functions are sequentially carried out in such a way that control instructions written in a ROM (read only memory) are sequentially read out at predetermined timings. According to the dynamic logic system, it is possible to use the memory, an arithmetic circuit, etc. in common for the respective functions. As a result, the complication of the circuit arrangement and the increase of the number of elements to be used are preventable.
However, in e.g. a timepiece of the dynamic logic system with the stop watch function whose time base is 0.01 second, various data processings are carried out within the time of 0.01 second. Therefore, as the number of the functions increases, the quantity of the data processings to be executed within the predetermined time increases. In order to increase the quantity of the data processings within the predetermined time, the frequency of timing pulses must be made high.
Stray capacitances and other capacitances in the circuit are charged and discharged by changes in the signals of the circuit. Power is dissipated by the charging and discharging of the capacitances. In consequence, the power dissipation of the circuit increases due to the raised frequency of the timing pulses.
In case of adding or altering the clock function, the display system etc., the allotment of the periods of time for the various data processings and the like need to be renewed. This leads to the problem that the electronic timepiece lacks in versatility.